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dc.contributor.authorGupta, Anu-
dc.date.accessioned2023-02-10T11:04:48Z-
dc.date.available2023-02-10T11:04:48Z-
dc.date.issued2013-
dc.identifier.urihttps://ieeexplore.ieee.org/abstract/document/6518985-
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9163-
dc.description.abstractThis work describes a symmetrical power supplied (±1.8 V) 0.5 μm CMOS implementation of a bio-amplifier designed for use in digital acquisition systems. The whole acquisition system under fabrication will still contain a 3 rd order switched capacitor anti-alias eliptic filter, a sample and hold, an ADC and a SPI interface. In this paper though the focus is over the analog circuitry responsable of amplifing the bio-signals. The achievable gains are controlled through a switched capacitor technique and can achieve over 70 dB with 2.5 μV RMS of input referred noise within 1.5 kHz bandwith. The circuit dissipates 33.2 μW in 0.192 mm 2en_US
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectEEEen_US
dc.subjectBio-Amplifieren_US
dc.subjectLow Noiseen_US
dc.subjectElectroencephalogram ,en_US
dc.subjectSwitched Capacitoren_US
dc.titleLow power low noise bio-amplifier with adjustable gain for digital bio-signals acquisition systemsen_US
dc.typeArticleen_US
Appears in Collections:Department of Electrical and Electronics Engineering

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