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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/9171
Title: On-Chip Intelligent Frequency Scaling using Artificial Neural Networks
Authors: Gupta, Anu
Keywords: EEE
Dynamic voltage and frequency scaling
Kohonen Self-Organizing Maps
CPU utilization
Issue Date: 2020
Publisher: IEEE
Abstract: Dynamic Voltage and Frequency Scaling (DVFS) is a popular method for reducing power consumption. Several DVFS techniques have been used for manually triggering a change in frequency to save power. This paper proposes a novel lightweight on-chip neural network (Kohonen Self-Organizing Maps) for user-behavior based frequency scaling to improve CPU performance, which senses and classifies the user-behavior based on the utilization of the processor and memory components and assigns appropriate frequency to achieve significant performance boost, while also obtaining mild power savings, and catering to multiple user-behaviors. Also, since the hardware of the ANN is implemented on-chip, no communication of data is required, thus, reducing the overhead of the implementation appreciably. The proposed technique has been evaluated on Intel i7-4720HQ Haswell processor and has shown performance boost by up to 47%, while saving up to 6% SoC power, simultaneously, as compared to the existing DVFS technique.
URI: https://ieeexplore.ieee.org/document/9342296
http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9171
Appears in Collections:Department of Electrical and Electronics Engineering

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