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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/9201
Title: High voltage gain reduced current ripple switched coupled inductor quasi-Z-source inverter
Authors: Bansal, Hari Om
Singh, Dheerendra
Keywords: EEE
Quasi-Z-source inverter (q-ZSI)
Issue Date: Dec-2019
Publisher: Wiley
Abstract: This article proposes an extended boost switched coupled inductor quasi-Z-source inverter (ESCL-q-ZSI) topology. The key features of ESCL-q-ZSI topology are high voltage gain, ripple-free continuous source current, and common ground between dc source and inverter circuit, and this makes it propitious for PV applications. Due to the presence of two different switched inductor (SL) structures, ESCL-q-ZSI topology offers high voltage gain at low shoot through duty ratio ( Dsh) as compared to reported switched inductor q-ZSI topologies. Low Dsh ensures high modulation index; hence, better output power quality is achieved. Moreover, both the SL structures used in ESCL-q-ZSI topology possess coupled inductors that aid in eliminating ripples in the source current and inductor currents. Thus, the average inductor current, in turn, inductor size required to obtain the same voltage gain gets reduced. This article is initiated with a brief literature review. It summarizes salutary factors in each chronologically developed switched inductor q-ZSI topology and remarks over limitations of each topology. Magnetic and mathematical considerations to design coupled inductor for SL structures are derived. The superiority of ESCL-q-ZSI over conventional topologies is projected through thorough comparative analysis. Effectiveness of the proposed topology is validated through a MATLAB/Simulink platform and a laboratory prototype.
URI: https://onlinelibrary.wiley.com/doi/full/10.1002/2050-7038.12305
http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9201
Appears in Collections:Department of Electrical and Electronics Engineering

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