Generic modified Baugh Wooley multiplier

Abstract

In this paper the structural pattern required to create a generic HDL code for a fast Baugh Wooley multiplier has been described. The ripple carry adder in the final stage of the conventional Baugh Wooley multiplier was replaced by a Linear Carry Select Adder, resulting in a modified Baugh Wooley architecture. The post-synthesis results of the multiplier architecture generated by the synthesis tool for HDL defined multiplication statement was compared with the synthesis results of conventional and as well as the modified Baugh Wooley multipliers for different operand sizes ranging from N=4 to N=60 using 90 nm technology library. The post synthesis results for characteristic parameters such as propagation delay, area and power consumption are compared. The comparison shows that the modified Baugh Wooley architecture is faster than the conventional architecture and the architecture generated by the synthesis tool for HDL defined multiplication statement. The speed improvement becomes significant for larger operand sizes.