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Title: | VLSI Implementation of a High Performance Barrel Shifter Architecture using Three Different Logic Design Styles |
Authors: | Asati, Abhijit Shekhar, Chandra |
Keywords: | EEE Barrel shifter Shifting VLSI CMOS Logic design styles Digital circuit design |
Issue Date: | Nov-2009 |
Publisher: | Academy Publisher |
Abstract: | Barrel shifters are often required for performing data shifting and rotation in many key computer operations from address decoding to computer arithmetic. In this paper we present a comparative study of various parameters like delay, power and area, for a high performance 16-bit barrel shifter VLSI implementations using three different logic design styles (conventional CMOS, transmission gate CMOS and Dual rail Domino CMOS logic) in 0.6mm, N-well CMOS process. The proposed barrel shifter implementations shows better performance as compared to implementation by R. Pereira |
URI: | https://www.proquest.com/openview/e2a2b477570340bba8573c593181647f/1?cbl=136092&pq-origsite=gscholar&parentSessionId=lmyFYEuQrx%2BSh29TDqds9yDsfzMjNB2KiJ80T9CZYgU%3D http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9418 |
Appears in Collections: | Department of Electrical and Electronics Engineering |
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