![DSpace logo](/jspui/image/logo.gif)
Please use this identifier to cite or link to this item:
http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/9418
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Asati, Abhijit | - |
dc.contributor.author | Shekhar, Chandra | - |
dc.date.accessioned | 2023-03-02T05:48:06Z | - |
dc.date.available | 2023-03-02T05:48:06Z | - |
dc.date.issued | 2009-11 | - |
dc.identifier.uri | https://www.proquest.com/openview/e2a2b477570340bba8573c593181647f/1?cbl=136092&pq-origsite=gscholar&parentSessionId=lmyFYEuQrx%2BSh29TDqds9yDsfzMjNB2KiJ80T9CZYgU%3D | - |
dc.identifier.uri | http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9418 | - |
dc.description.abstract | Barrel shifters are often required for performing data shifting and rotation in many key computer operations from address decoding to computer arithmetic. In this paper we present a comparative study of various parameters like delay, power and area, for a high performance 16-bit barrel shifter VLSI implementations using three different logic design styles (conventional CMOS, transmission gate CMOS and Dual rail Domino CMOS logic) in 0.6mm, N-well CMOS process. The proposed barrel shifter implementations shows better performance as compared to implementation by R. Pereira | en_US |
dc.language.iso | en | en_US |
dc.publisher | Academy Publisher | en_US |
dc.subject | EEE | en_US |
dc.subject | Barrel shifter | en_US |
dc.subject | Shifting | en_US |
dc.subject | VLSI | en_US |
dc.subject | CMOS | en_US |
dc.subject | Logic design styles | en_US |
dc.subject | Digital circuit design | en_US |
dc.title | VLSI Implementation of a High Performance Barrel Shifter Architecture using Three Different Logic Design Styles | en_US |
dc.type | Article | en_US |
Appears in Collections: | Department of Electrical and Electronics Engineering |
Files in This Item:
There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.