Leakage Immune 9T-SRAM Cell in Sub-threshold Region

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DC Field	Value	Language
dc.contributor.author	Gupta, Anu	-
dc.contributor.author	Asati, Abhijit	-
dc.date.accessioned	2023-03-02T09:09:24Z	-
dc.date.available	2023-03-02T09:09:24Z	-
dc.date.issued	2016	-
dc.identifier.uri	https://www.beei.org/index.php/EEI/article/view/557	-
dc.identifier.uri	http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9430	-
dc.description.abstract	The paper presents a variability-aware modified 9T SRAM cell. In comparison to 6T SRAM cell the proposed cell achieves 1.3× higher read-SNM and 1.77× higher write-SNM with 79.6% SINM (static current noise margin) distribution at the expense of 14.7× lower WTI (write trip current) at 0.4 V power supply voltage, while maintaining similar stability in hold mode. Thus, comparative analysis exhibits that the proposed design has a significant improvement, thereby achieving high cell stability at 45nm technology.	en_US
dc.language.iso	en	en_US
dc.publisher	IAES	en_US
dc.subject	EEE	en_US
dc.subject	Low power SRAM	en_US
dc.subject	Process variations	en_US
dc.subject	Sub-threshold SRAM	en_US
dc.subject	Static noise margin	en_US
dc.subject	Stability	en_US
dc.title	Leakage Immune 9T-SRAM Cell in Sub-threshold Region	en_US
dc.type	Article	en_US
Appears in Collections:	Department of Electrical and Electronics Engineering

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