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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/9438
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dc.contributor.authorAsati, Abhijit
dc.contributor.authorShenoy, Meetha V
dc.date.accessioned2023-03-02T10:09:00Z
dc.date.available2023-03-02T10:09:00Z
dc.date.issued2022-05
dc.identifier.urihttps://link.springer.com/chapter/10.1007/978-981-19-0475-2_17
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9438
dc.description.abstractThe convolutional neural network (CNN) models have proved to be very advantageous in computer vision and image processing applications. Recently, due to the increased accuracy of the CNNs on an extensive variety of classification and recognition tasks, the demand for real-time hardware implementations has dramatically increased. They involve intensive processing operations and memory bandwidth for achieving desired performance. The hardware resources and approximate performance estimation of a target system at a higher level of abstraction is very important for optimized hardware implementation. In this paper, initially we developed an ‘Optimized CNN model’, and then we explored the approximate operations and hardware resource estimation for this CNN model along with suitable hardware implementation process. We also compared the computed operations and hardware resource estimation of few published CNN architectures, which shows that optimization process highly helps in reducing the hardware resources along with providing a similar accuracy. This research has mainly focused on the computational complexity of the convolutional and fully connected layers of our implemented CNN model.en_US
dc.language.isoenen_US
dc.publisherSpringeren_US
dc.subjectEEEen_US
dc.subjectConvolutional neural network (CNN)en_US
dc.subjectComputational operationsen_US
dc.subjectHardware resource estimationen_US
dc.titleComputational Operations and Hardware Resource Estimation in a Convolutional Neural Network Architectureen_US
dc.typeArticleen_US
Appears in Collections:Department of Electrical and Electronics Engineering

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