An Improved DVFS Circuit & Error Correction Technique

Abstract

Dynamic voltage and frequency scaling (DVFS) is useful for low power digital circuit design. The work proposes a novel DVFS module offering any finer clock frequency change to produce an appropriate supply voltage to feed a digital circuit driven by DVFS module. In DVFS with varying supply and clock conditions the chances of setup and hold timing violations in D flip-flop (DFF) circuit may increase. The DVFS module driving a digital circuit utilizing Razor D flip-flop is used to correct errors occurring due to timing violations. The proposed circuit simulation shows that DVFS module driving simple D flip -flop shows error due to timing violations, while the DVFS module driving Razor D flip-flop shows the correct operation. In the digital pipelined circuits any occurrence of timing violations, the Razor DFF uses the error correction mechanism to prevent data loss with a penalty of one additional clock cycle.