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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/handle/123456789/9739
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dc.contributor.authorChaturvedi, Nitin-
dc.date.accessioned2023-03-15T07:16:23Z-
dc.date.available2023-03-15T07:16:23Z-
dc.date.issued2016-
dc.identifier.urihttps://ieeexplore.ieee.org/document/7915013-
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9739-
dc.description.abstractThis paper investigates the application of Spin-Transfer Torque Magnetic Tunnel Junctions (STT-MTJ) in nonvolatile memory design. MTJs are favored in NVM design as they can provide indefinite data retention and very high read/write speeds. In this work, we have presented the design and analysis of a non-volatile, low power Muller C-element with almost-zero leakage current and instantaneous back-up and wake-up times. The simulations results of the C-element based on technology incorporating CMOS FD-SOI and Spin Transfer Torque MTJs are compared with those of a design in which FinFETs are utilized instead of the FDSOI transistors. The two implementations are compared on the basis of idle power consumption, energy required for read and write functionality as well as output delay in addition to the scalability analysis of both the technologies.en_US
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectEEEen_US
dc.subjectSpin Transfer Torque-Magnetic Tunnel Junction (STT-MTJ)en_US
dc.subjectNon-volatile C-elementen_US
dc.subjectAlmost-zero leakageen_US
dc.subjectCMOS-FDSOIen_US
dc.subjectNanoscale Parabolic FinFETen_US
dc.titleDesign of non-volatile asynchronous circuit using CMOS-FDSOI/FinFET technologiesen_US
dc.typeArticleen_US
Appears in Collections:Department of Electrical and Electronics Engineering

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