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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/9887
Title: Efficient IIR notch filter design using Minimax optimization for 50Hz noise suppression in ECG
Authors: Mishra, Puneet
Keywords: EEE
Notch filter
Infinite impulse response
ECG signal
Field-programmable gate array
Power line noise suppression
Issue Date: 2015
Publisher: IEEE
Abstract: Quality of Electrocardiogram (ECG) signal is very important for patient health diagnostics. ECG consists of frequencies ranging from 0.01 - 300Hz, while being a very small magnitude signal. ECG usually gets corrupted by the 50Hz power line interference (PLI). Thus, filtering out the PLI is a necessary task for the right diagnostics. In this work a second order efficient digital infinite impulse response (IIR) notch filter is designed to suppress PLI. For this task, Minimax optimization technique has been utilized to minimize the root mean square error (RMSE) defined as the difference of magnitude response of ideal and proposed IIR notch filter designs. The optimization process was able to set pole position close to the unit circle and the pass band gain is so chosen so as to have symmetrical performance resulting in attenuation at 50Hz notch of -260dB, a gain of 0.995 and -3dB bandwidth of 2.375Hz. The performance of the designed filter has been investigated theoretically as well as validated experimentally on a contaminated ECG signal and a pure sinusoid signal of 50Hz on field programmable gate array (FPGA) in the LabVIEW environment. In simulation, a power spectral density (PSD) of -30dB has been achieved for the simulated ECG signal originally having 4dB PSD at 50Hz and an attenuation of -30dB in PSD has been obtained for a pure sinusoidal signal. The designed filter was also implemented on FPGA a PSD of -26dB was obtained for ECG at 50Hz and -26dB for sinusoidal signal, respectively. Based on these studies it can be concluded that the proposed Minimax based notch filter design is an efficient one.
URI: https://ieeexplore.ieee.org/document/7375043
http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9887
Appears in Collections:Department of Electrical and Electronics Engineering

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