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Results 1-9 of 9 (Search time: 0.003 seconds).
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Issue Date
Title
Author(s)
2020-11
Speed optimal FPGA implementation of the encryption algorithms for telecom applications
Asati, Abhijit
;
Shekhar, Chandra
2021-02
Real time FPGA implementation of a high speed and area optimized Harris corner detection algorithm
Asati, Abhijit
;
Shekhar, Chandra
2020-07
RETRACTED ARTICLE: High-throughput field-programable gate array implementation of the advanced encryption standard algorithm for automotive security applications
Asati, Abhijit
;
Shekhar, Chandra
2020-05
High-speed and area-efficient Sobel edge detector on field-programmable gate array for artificial intelligence and machine learning applications
Asati, Abhijit
;
Shekhar, Chandra
2020-11
Power- and Area-Optimized High-Level Synthesis Implementation of a Digital Down Converter for Software-Defined Radio Applications
Asati, Abhijit
;
Shekhar, Chandra
2021-07
Area, Speed and Power Optimized Implementation of a Band-Pass FIR Filter Using High-Level Synthesis
Asati, Abhijit
;
Shekhar, Chandra
2020-10
High-Level synthesis assisted design and verification framework for automotive radar processors
Asati, Abhijit
;
Shekhar, Chandra
2021-12
Low-Area, High-Throughput Field-Programmable Gate Array Implementation of Microprocessor Without Interlocked Pipeline Stages
Asati, Abhijit
;
Shekhar, Chandra
2020
Area-optimal FPGA implementation of the YOLO v2 algorithm using High-Level Synthesis
Asati, Abhijit
;
Shekhar, Chandra
Discover
Subject
1
Artificial Intelligence
1
Convolutional Neural Networks (CNN)
1
Digital down converters (DDCs
1
Field programmable gate arrays
1
Field-programable gate array (FPGA)
1
Hardware description language
1
Harris corner detection
1
High-Level Synthesis
1
High-level synthesis
1
High-speed
.
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Date issued
6
2020
3
2021