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Issue Date
Title
Author(s)
2020-11
Speed optimal FPGA implementation of the encryption algorithms for telecom applications
Asati, Abhijit
;
Shekhar, Chandra
2021-02
Real time FPGA implementation of a high speed and area optimized Harris corner detection algorithm
Asati, Abhijit
;
Shekhar, Chandra
2020-07
RETRACTED ARTICLE: High-throughput field-programable gate array implementation of the advanced encryption standard algorithm for automotive security applications
Asati, Abhijit
;
Shekhar, Chandra
2020-05
High-speed and area-efficient Sobel edge detector on field-programmable gate array for artificial intelligence and machine learning applications
Asati, Abhijit
;
Shekhar, Chandra
2020-11
Power- and Area-Optimized High-Level Synthesis Implementation of a Digital Down Converter for Software-Defined Radio Applications
Asati, Abhijit
;
Shekhar, Chandra
2021-07
Area, Speed and Power Optimized Implementation of a Band-Pass FIR Filter Using High-Level Synthesis
Asati, Abhijit
;
Shekhar, Chandra
2020-10
High-Level synthesis assisted design and verification framework for automotive radar processors
Asati, Abhijit
;
Shekhar, Chandra
2020
Clock Gating Analysis of TG Based D Flip-Flop for Different Technology Nodes
Asati, Abhijit
2022-07
Dedicated hardware architecture for localizing iris in VW images
Asati, Abhijit
;
Gupta, Anu
2022-12
Analysis of Logical Effort-Based Optimization in the Deep Submicron Technologies
Asati, Abhijit
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Author
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Chamola, Vinay
34
Rao, V. Ramgopal
29
Bitragunta, Sainath
28
Bansal, Hari Om
27
Zafaruddin, S.M.
26
Mathur, Hitesh Dutt
22
Gupta, Karunesh Kumar
22
Gupta, Navneet
19
Asati, Abhijit
17
Hazra, Arnab
.
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29
Blockchain
17
Performance analysis
15
Machine Learning
14
Deep Learning
14
Internet of Things (IoT)
11
Security
10
Carbon Nanotube Field-Effect Tran...
10
Outage probability
9
45 nm CMOS technology
9
Neural networks
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