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Results 1-10 of 13 (Search time: 0.003 seconds).
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Issue Date
Title
Author(s)
2020
On the Threshold Voltage and Performance of ZnO-Based Thin-Film Transistors with a ZrO2 Gate Dielectric
Gupta, Navneet
;
Kandpal, Kavindra
;
Shekhar, Chandra
2008
Effect of trap states at the oxide-silicon interface in polycrystalline silicon thin-film transistors
Gupta, Navneet
2007
Effect of gate oxide thickness on polycrystalline silicon thin-filmtransistors
Gupta, Navneet
2009
Logic Design Style based NBTI Degradation Study using Verilog
Asati, Abhijit
2020-07
Effect of Device Dimensions, Layout and Pre-Gate Carbon Implant on Hot Carrier Induced Degradation in HKMG nMOS Transistors
Rao, V. Ramgopal
2017-08
PBTI in HKMG nMOS Transistors— Effect of Width, Layout, and Other Technological Parameters
Rao, V. Ramgopal
2006-08
The Effects of Varying Tilt Angle of Halo Implant on the Performance of Sub 100nm LAC MOSFETs
Rao, V. Ramgopal
2003
Effect of programming biases on the reliability of CHE and CHISEL flash EEPROMs
Rao, V. Ramgopal
2003-02
A novel dynamic threshold operation using electrically induced junction MOSFET in the deep sub-micrometer CMOS regime
Rao, V. Ramgopal
2005
A new drain voltage enhanced NBTI degradation mechanism [pMOSFETs]
Rao, V. Ramgopal
Discover
Author
9
Rao, V. Ramgopal
3
Gupta, Navneet
1
Asati, Abhijit
1
Kandpal, Kavindra
1
Shekhar, Chandra
Subject
4
Degradation
2
Channel width
2
Charge measurement
2
Device scaling
2
Gate current
2
Los Angeles Council
2
MOSFET circuits
2
MOSFETs
2
Nonvolatile memory
2
Pulse measurements
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Date issued
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2010 - 2020
10
2001 - 2009
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false