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Results 21-30 of 31 (Search time: 0.004 seconds).
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Issue Date
Title
Author(s)
2013
Automated HDL Generation of Two’s Complement Wallace Multiplier With Paralle Prefix Adders
Asati, Abhijit
2016-02
A modular approach to random task graph generation
Asati, Abhijit
2012
Hardware software co-design using profiling and clustering
Asati, Abhijit
2013
Automated HDL generation of two’s complement Dadda multiplier with Parallel Prefix Adders
Asati, Abhijit
2012
3-D device matrix approach: A new algorithm for plotting energy band diagrams in semiconductors
Asati, Abhijit
2016
Leakage Immune 9T-SRAM Cell in Sub-threshold Region
Gupta, Anu
;
Asati, Abhijit
2015
Design of ultra low power flip flops in sub-threshold region for bio-medical application in 45nm, 32nm and 22nm technologies
Asati, Abhijit
2016
Effectiveness of body bias & hybrid logic: An energy efficient approach to design adders in sub-threshold regime
Gupta, Anu
;
Asati, Abhijit
2019-09
Low-voltage, low-power SRAM circuits using subthreshold design technique
Asati, Abhijit
;
Gupta, Anu
2012
Design of a Static Current Simulator Using Device Matrix Approach
Asati, Abhijit
Discover
Author
17
Gupta, Anu
1
Shekhar, Chandra
Subject
3
Han-Carlson Adder
3
Iris localization
3
iris recognition
3
Iris segmentation
3
Power-delay product (PDP)
3
Sub-threshold
3
Sub-threshold Regime
2
Brent-Kung adder
2
Carry ripple adder(CRA)
2
Circular Hough Transform (CHT)
.
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