BITS Pilani Institutional Repository: Search

Search

Search:
for

Current filters:

Start a new search

Add filters:

Results/Page | Sort items by In order Authors/record

Results 1-10 of 14 (Search time: 0.004 seconds).

previous
1
2
next

Item hits:

Issue Date	Title	Author(s)
2018	Pattern-Based Automatic Parallelization of Representative-Based Clustering Algorithms	Goyal, Poonam; Goyal, Navneet
2016-11	A Domain Specific Language for Clustering	Goyal, Navneet; Goyal, Poonam
2016	Scalable Parallel Algorithms for Shared Nearest Neighbor Clustering	Goyal, Navneet; Goyal, Poonam
2016	A Fast, Scalable SLINK Algorithm for Commodity Cluster Computing Exploiting Spatial Locality	Goyal, Navneet; Goyal, Poonam
2011	Phase-Wise Clustering of Time Series Gene Expression Data	Goyal, Navneet; Goyal, Poonam
2018	Topical document clustering: two-stage post processing technique	Goyal, Poonam; Goyal, Navneet
2020	Multilevel Event Detection, Storyline Generation, and Summarization for Tweet Streams	Goyal, Navneet; Goyal, Poonam
2015-10	Parallel Framework for Efficient k-means Clustering	Goyal, Navneet; Goyal, Poonam
2020	A Machine Learning Approach for Traffic Flow Provisioning in Software Defined Networks	Shekhawat, Virendra Singh
2012-12	Energy efficient voltage scheduling for multi-core processors is an important issue in the context of parallel and distributed computing. Dynamic voltage scaling (DVS) is used to reduce the energy consumption of cores. Nowadays processor vendors are providing software for DVS. We consider a system using a single multi-core processor with software controlled DVS having a finite set of discretely available core speeds. Our contribution to this work is solving a well-known energy efficient voltage scheduling problem on the considered system. The problem that we consider is to find a minimum energy voltage scheduling for a given computational load that has to be completed within a given deadline. First we show that the existing methods to solve this problem on other processor models fail to apply on our processor model. Then we formulate an Integer Program (IP) for the problem.	Mishra, Abhishek