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An ultra-low-power CNFET-based improved Schmitt triggerdesign for VLSI sensor applications

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dc.contributor.author Vidhyadharan, Sanjay
dc.date.accessioned 2023-04-06T09:28:57Z
dc.date.available 2023-04-06T09:28:57Z
dc.date.issued 2020-11
dc.identifier.uri https://onlinelibrary.wiley.com/doi/epdf/10.1002/jnm.2874
dc.identifier.uri http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/10214
dc.description.abstract To enable easy integration of Internet of Things (IoT) sensors with digital verylarge scale integrtaion (VLSI) circuits, the interface circuits need to operateefficiently even at low power supply voltages, consuming minimum powerfrom the limited onboard supply source. Schmitt triggers have higher noisemargins and lower delays as compared to conventional static CMOS logic cir-cuits, at low-voltage levels and hence are being widely used in VLSI sensorapplications. Carbon nanotube FETs (CNFETs) haveION:IOFFandION:CGGratios significantly greater than the corresponding CMOS devices, and hencethey have been acknowledged as viable candidates to replace CMOS devices inultra-low-power VLSI circuits. This article presents an ultra-low-powerCNFET-based Schmitt trigger design, which consumes significantly lowerpower than the conventional design. The cause of the higher power consump-tion in conventional CMOS-based Schmitt trigger is the availability of a directpath betweenVDDand ground for a longer time duration, during switching.The short-circuit path in the conventional CMOS Schmitt trigger circuit is theresult of the design methodology adopted to obtain hysteresis in VTC curve.The threshold voltage of the CNFET can be easily configured by an appropri-ate selection of its chiral vector. This property of the CNFET has been used inthe implementation of a new, simple but effective Schmitt trigger, which mini-mizes the short-circuit currents, while providing the same hysteresis as that ofconventional design. The proposed circuit operates at 0.4 VVDDto cater forlow-voltage levels of VLSI sensor applications. The proposed CNFET-basedSchmitt trigger consumes only 0.002 times the power of conventional CMOSSchmitt trigger and operates 56 times faster than the conventional CMOSdesign. The overall PDP in the proposed CNFET-based Schmitt trigger hasbeen demonstrated to be merely 0.0003% of the PDP in corresponding conven-tional designs en_US
dc.language.iso en en_US
dc.publisher Wiley en_US
dc.subject EEE en_US
dc.subject 45 nm CMOS technology en_US
dc.subject Carbon Nanotube Field-Effect Transistors (CNFETs) en_US
dc.subject Low-voltage cascode mirroring en_US
dc.subject VLSI design en_US
dc.title An ultra-low-power CNFET-based improved Schmitt triggerdesign for VLSI sensor applications en_US
dc.type Article en_US


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