DSpace Repository

A Nano-Electro-Mechanical Switch Based Power Gating for Effective Stand-by Power Reduction in FinFET Technologies

Show simple item record

dc.contributor.author Rao, V. Ramgopal
dc.date.accessioned 2023-10-23T04:08:41Z
dc.date.available 2023-10-23T04:08:41Z
dc.date.issued 2017-05
dc.identifier.uri https://ieeexplore.ieee.org/document/7885519
dc.identifier.uri http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12587
dc.description.abstract In this letter, we show that using the experimentally demonstrated nano-electro-mechanical-switches (NEMS) and our design methodology, the standby power dissipation can be reduced to negligible levels in 14-nm bulk FinFET technologies. Using two realistic NEMS structures, demonstrated in the literature for power gating applications, a design window is derived for achieving the targeted specifications without compromising on the performance and area. Cantilever NEMS requires less area as compared with the suspended NEMS, but reliability is a concern. We demonstrate that for a 17-stage ring oscillator circuit, the NEMS power gating will perform better than the FinFET-based power gating when the T ON /T OFF ratio is less than 0.002. en_US
dc.language.iso en en_US
dc.publisher IEEE en_US
dc.subject EEE en_US
dc.subject NEMS en_US
dc.subject Power gating (PG) en_US
dc.subject FinFET en_US
dc.subject Berkeley short-channel IGFET model–common multi-gate (BSIM-CMG) en_US
dc.title A Nano-Electro-Mechanical Switch Based Power Gating for Effective Stand-by Power Reduction in FinFET Technologies en_US
dc.type Article en_US


Files in this item

Files Size Format View

There are no files associated with this item.

This item appears in the following Collection(s)

Show simple item record

Search DSpace


Advanced Search

Browse

My Account