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Understanding and Optimization of Hot-Carrier Reliability in Germanium-on-Silicon pMOSFETs

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dc.contributor.author Rao, V. Ramgopal
dc.date.accessioned 2023-10-28T04:42:40Z
dc.date.available 2023-10-28T04:42:40Z
dc.date.issued 2009-05
dc.identifier.uri https://ieeexplore.ieee.org/abstract/document/4804776
dc.identifier.uri http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12699
dc.description.abstract In this paper, a comprehensive study of hot- carrier injection (HCI) has been performed on high-performance Si-passivated pMOSFETs with high-k metal gate fabricated on n-type germanium-on-silicon (Ge-on-Si) substrates. Negative bias temperature instability (NBTI) has also been explored on the same devices. The following are found: (1) Impact ionization rate in Ge-on-Si MOSFETs is approximately two orders higher as compared to their Si counterpart; (2) NBTI degradation is a lesser concern than HCI for Ge-on-Si pMOSFETs; and (3) increasing the Si-passivation thickness from four to eight monolayers provides a remarkable lifetime improvement. en_US
dc.language.iso en en_US
dc.publisher IEEE en_US
dc.subject EEE en_US
dc.subject Germanium (Ge) en_US
dc.subject Hot carrier (HC) en_US
dc.subject Impact ionization en_US
dc.subject Negative bias temperature instability (NBTI) en_US
dc.subject pMOSFET en_US
dc.title Understanding and Optimization of Hot-Carrier Reliability in Germanium-on-Silicon pMOSFETs en_US
dc.type Article en_US


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