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Power-area evaluation of various double-gate RF mixer topologies

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dc.contributor.author Rao, V. Ramgopal
dc.date.accessioned 2023-10-30T10:00:50Z
dc.date.available 2023-10-30T10:00:50Z
dc.date.issued 2005-09
dc.identifier.uri https://ieeexplore.ieee.org/document/1498992
dc.identifier.uri http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12729
dc.description.abstract We analyze the suitability of the double gate MOSFETs (DG MOSFETs) for RF-mixer applications from the point of optimizing the transconductance gain, power consumption, and area. Mixer topologies using the 0.13-μm conventional MOSFETs, simultaneously driven DG MOSFETs (SDDG) and the independently driven DG MOSFETs (IDDG) are compared using extensive device simulations. In the frequency range 1-40 GHz, our simulation results show that the mixer circuits realized using the SDDG technologies show an order of magnitude lower power-area product, for a given transconductance gain, compared to the conventional and the IDDG technologies. en_US
dc.language.iso en en_US
dc.publisher IEEE en_US
dc.subject EEE en_US
dc.subject Device simulation en_US
dc.subject Double-gate MOSFET (DG MOSFET) en_US
dc.subject RF-Mixer en_US
dc.subject MOSFETs en_US
dc.title Power-area evaluation of various double-gate RF mixer topologies en_US
dc.type Article en_US


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