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Impact of lateral asymmetric channel doping on deep submicrometer mixed-signal device and circuit performance

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dc.contributor.author Rao, V. Ramgopal
dc.date.accessioned 2023-10-31T05:54:48Z
dc.date.available 2023-10-31T05:54:48Z
dc.date.issued 2003-12
dc.identifier.uri https://ieeexplore.ieee.org/document/1255612
dc.identifier.uri http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12744
dc.description.abstract In this paper, we have systematically investigated the effect of scaling on analog performance parameters in lateral asymmetric channel (LAC) MOSFETs and compared their performance with conventional (CON) MOSFETs for mixed-signal applications. Our results show that, in LAC MOSFETs, there is significant improvement in the intrinsic device performance for analog applications (such as device gain, gm/I/sub D/ etc.) down to the 70-nm technology node, in addition to an improvement in drive current and other parameters over a wide range of channel lengths. A systematic comparison on the performance of amplifiers and CMOS inverters with CON and LAC MOSFETs is also performed. The tradeoff between power dissipation and device performance is explored with detailed circuit simulations for both CON and LAC MOSFETs. en_US
dc.language.iso en en_US
dc.publisher IEEE en_US
dc.subject EEE en_US
dc.subject MOSFETs en_US
dc.subject Semiconductor device doping en_US
dc.subject Mixed analog-digital integrated circuits en_US
dc.subject CMOS integrated circuits en_US
dc.title Impact of lateral asymmetric channel doping on deep submicrometer mixed-signal device and circuit performance en_US
dc.type Article en_US


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