| dc.contributor.author | Rao, V. Ramgopal | |
| dc.date.accessioned | 2023-10-31T09:04:37Z | |
| dc.date.available | 2023-10-31T09:04:37Z | |
| dc.date.issued | 1999-10 | |
| dc.identifier.uri | https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=791935 | |
| dc.identifier.uri | http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12760 | |
| dc.description.abstract | The electron velocity overshoot phenomenon in the inversion layer is experimentally investigated using a novel thinfilm silicon-on-insulator (SOI) test structure with channel lengths down to 0.08 m. The uniformity of the carrier density and tangential field is realized by employing a lateral asymmetric channel (LAC) profile. The electron drift velocity observed in this work is 9.5 106 cm/s for a device with Le = 0:08 m at 300 K. The upward trend in electron velocity can be clearly noticed for decreasing channel lengths | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | IEEE | en_US |
| dc.subject | EEE | en_US |
| dc.subject | Asymmetric channel profile | en_US |
| dc.subject | Deep-0.1-um MOSFETs | en_US |
| dc.title | Exploration of Velocity Overshoot in a High-Performance Deep Sub-0.1- m SOI MOSFET with Asymmetric Channel Profile | en_US |
| dc.type | Article | en_US |
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