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DC & transient circuit simulation methodologies for organic electronics

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dc.contributor.author Rao, V. Ramgopal
dc.date.accessioned 2023-11-03T09:02:14Z
dc.date.available 2023-11-03T09:02:14Z
dc.date.issued 2009
dc.identifier.uri https://ieeexplore.ieee.org/document/5166122?arnumber=5166122
dc.identifier.uri http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12843
dc.description.abstract This work establishes a novel circuit simulation methodology for organic thin film transistors (OTFTs). Because of a lack of well developed physical models for OTFTs and due to the limitations of conventional parameter extraction techniques, the approaches presented in this work come in handy for circuit designers. The first approach uses a look-up table (LUT) model, which is implemented in a general purpose public-domain circuit simulator SEQUEL (solver for circuit equations with user-defined elements). In the second approach, circuit simulation is performed using equivalent SPICE parameters, which are extracted using a global optimization technique namely particle swarm optimization (PSO) algorithm. A good match has been observed between LUT simulations and SPICE based circuit simulations for both DC and transient cases. en_US
dc.language.iso en en_US
dc.publisher IEEE en_US
dc.subject EEE en_US
dc.subject Look-up table (LUT) en_US
dc.subject Organic thin film transistor (OTFT) en_US
dc.subject Particle swarm optimization (PSO) en_US
dc.subject SEQUEL en_US
dc.title DC & transient circuit simulation methodologies for organic electronics en_US
dc.type Article en_US


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