DSpace Repository

Effectiveness of Optimum Body Bias for Leakage Reduction in High-K CMOS Circuits

Show simple item record

dc.contributor.author Rao, V. Ramgopal
dc.date.accessioned 2023-11-06T06:35:11Z
dc.date.available 2023-11-06T06:35:11Z
dc.date.issued 2004
dc.identifier.uri https://confit.atlas.jp/guide/organizer/ssdm/ssdm2004/subject/P2-16/search?page=34
dc.identifier.uri http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12866
dc.description.abstract Optimal body bias (OBB) has been recently shown to be effective in minimizing the exponentially increasing drain leakage in deep submicron technologies [1], [2]. High permittivity (high K) gate dielectrics, proposed to eliminate gate direct tunnelling leakage current, however increase the drain leakage due to FIBL [3], [4]. In this work, we study the applicability of OBB in minimising the drain leakage for high-K gate dielectric MOSFETs. We observe that in high-K p-MOSFETs, the band-to-band tunnelling (BTBT) current increases dramatically with increasing K. This is due to the combined effect of fringing fields and higher density of states in valance band, as shown for the first time in this work. We show that this effect renders the important circuit technique of applying OBB less effective in high-K CMOS circuits. en_US
dc.language.iso en en_US
dc.publisher SSDM en_US
dc.subject EEE en_US
dc.subject Optimal body bias (OBB) en_US
dc.subject CMOS integrated circuits en_US
dc.title Effectiveness of Optimum Body Bias for Leakage Reduction in High-K CMOS Circuits en_US
dc.type Article en_US


Files in this item

Files Size Format View

There are no files associated with this item.

This item appears in the following Collection(s)

Show simple item record

Search DSpace


Advanced Search

Browse

My Account