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Optimization of Single Halo p-MOSFET Implant Parameters for Improved Analog Performance and Reliability

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dc.contributor.author Rao, V. Ramgopal
dc.date.accessioned 2023-11-07T04:17:32Z
dc.date.available 2023-11-07T04:17:32Z
dc.date.issued 2002-09
dc.identifier.uri https://ieeexplore.ieee.org/abstract/document/1503933
dc.identifier.uri http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12885
dc.description.abstract Single halo (SH) MOSFETs are recently proposed for mixed signal applications in view of their superior analog performance such as gain, transconductance, output resistance etc [1]. In this work, we investigate the hot carrier degradation behaviour of SH and conventional p-MOSFETs using specific stress conditions appropriate for analog applications. The degradation of analog device parameters due to Cannel Hot carrier (CHC) stress and its implications on circuit operation are discussed. en_US
dc.language.iso en en_US
dc.publisher IEEE en_US
dc.subject EEE en_US
dc.subject MOSFET circuits en_US
dc.subject Implants en_US
dc.subject Degradation en_US
dc.subject Current measurement en_US
dc.subject Analog circuits en_US
dc.subject Stress measurement en_US
dc.subject Voltage en_US
dc.title Optimization of Single Halo p-MOSFET Implant Parameters for Improved Analog Performance and Reliability en_US
dc.type Animation en_US


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