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Drain Bias Dependence of Gate Oxide Reliability in Conventional and Asymmetrical Channel MOSFETs in the Low Voltage Regime

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dc.contributor.author Rao, V. Ramgopal
dc.date.accessioned 2023-11-07T09:24:00Z
dc.date.available 2023-11-07T09:24:00Z
dc.date.issued 2000-09
dc.identifier.uri https://ieeexplore.ieee.org/document/1503660
dc.identifier.uri http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12896
dc.description.abstract Drain bias dependence of gate oxide reliability is investigated on conventional (CON) and Lateral Asymmetric Channel (LAC) MOSFETs for low drain voltages that correspond to the real operating voltages for deep-sub-micron devices. For short channel devices, the oxide reliability improves drastically as drain bias increases. Device simulations showed that the vertical field distribution in the oxide is asymmetric for non-zero drain biases and this results in an asymmetric gate current distribution with the peak at the source end. By introducing an intentionally graded doping profile along the channel (LAC), the asymmetry in the vertical filed distribution can be enhanced with consequent improvement in gate oxide reliability. en_US
dc.language.iso en en_US
dc.publisher IEEE en_US
dc.subject EEE en_US
dc.subject MOSFETs en_US
dc.subject Low voltage en_US
dc.subject Los Angeles Council en_US
dc.subject Stress en_US
dc.subject Temperature en_US
dc.title Drain Bias Dependence of Gate Oxide Reliability in Conventional and Asymmetrical Channel MOSFETs in the Low Voltage Regime en_US
dc.type Article en_US


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