| dc.contributor.author |
Rao, V. Ramgopal |
|
| dc.date.accessioned |
2023-11-07T10:30:32Z |
|
| dc.date.available |
2023-11-07T10:30:32Z |
|
| dc.date.issued |
1999 |
|
| dc.identifier.uri |
https://ieeexplore.ieee.org/document/799344 |
|
| dc.identifier.uri |
http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12901 |
|
| dc.description.abstract |
The effects of channel engineering on device performance have been extensively investigated. The lateral asymmetric channel (LAC) MOSFETs show significantly higher I/sub dsat/ and g/sub msat/, lower I/sub off/, and superior short-channel performance compared with double-halo (DH) and conventional MOSFETs by effectively utilizing the velocity overshoot effects. It is demonstrated that the device switching speed of the LAC device at V/sub DD/=0.6 V is equivalent to that of a conventional device operated at V/sub DD/=1.5 V. |
en_US |
| dc.language.iso |
en |
en_US |
| dc.publisher |
IEEE |
en_US |
| dc.subject |
EEE |
en_US |
| dc.subject |
Power engineering and energy |
en_US |
| dc.subject |
Power supplies |
en_US |
| dc.subject |
Los Angeles Council |
en_US |
| dc.subject |
MOSFETs |
en_US |
| dc.subject |
DH-HEMTs |
en_US |
| dc.subject |
MOS devices |
en_US |
| dc.title |
Channel engineering for high speed sub-1.0 V power supply deep sub-micron CMOS |
en_US |
| dc.type |
Article |
en_US |