Abstract:
High-K gate dielectrics have been under
extensive investigation for use in sub-lOOnm
MOSFETs to suppress gate leakage. However,
thicker gate dielectrics can result in
degradation of the electrical performance
due to increased fringing fields from the
gate to source/drain. In this paper, the
capacitance degradation resulting from this
effect is analyzed and a simple technique to
model this effect is presented.