dc.contributor.author | Rao, V. Ramgopal | |
dc.date.accessioned | 2023-11-07T11:15:27Z | |
dc.date.available | 2023-11-07T11:15:27Z | |
dc.date.issued | 1997-10 | |
dc.identifier.uri | 10.1109/ESSDERC.1997.194506 | |
dc.identifier.uri | http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12907 | |
dc.description.abstract | Introducing a concept of Electric-Field-Tailoring in vertical grown MOSFETs significant improvements concerning supply voltage, current and speed are possible. Based on vertical Silicon MOSFETs with sub-100nm channel lengths Planar-Doped-BarrierFETs were fabricated. Investigations on electrical characteristics and carrier transport show the predicted improvements compared to classical MOSFETs. | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEEE | en_US |
dc.subject | EEE | en_US |
dc.subject | MOSFETs | en_US |
dc.title | The Planar-Doped-Barrier FET:MOSFET Overcomes Conventional Limitations | en_US |
dc.type | Article | en_US |
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