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Energy efficient voltage scheduling for multi-core processors with software controlled dynamic voltage scaling

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dc.contributor.author Mishra, Abhishek
dc.date.accessioned 2024-05-06T08:49:59Z
dc.date.available 2024-05-06T08:49:59Z
dc.date.issued 2014-07
dc.identifier.uri https://www.sciencedirect.com/science/article/pii/S0307904X13008147
dc.identifier.uri http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/14728
dc.description.abstract Energy efficient voltage scheduling for multi-core processors is an important issue in the context of parallel and distributed computing. Dynamic voltage scaling (DVS) is used to reduce the energy consumption of cores. Nowadays processor vendors are providing software for DVS. We consider a system using a single multi-core processor with software controlled DVS having a finite set of discretely available core speeds. Our contribution to this work is solving a well-known energy efficient voltage scheduling problem on the considered system. The problem that we consider is to find a minimum energy voltage scheduling for a given computational load that has to be completed within a given deadline. First we show that the existing methods to solve this problem on other processor models fail to apply on our processor model. Then we formulate an Integer Program (IP) for the problem. en_US
dc.language.iso en en_US
dc.publisher Elsevier en_US
dc.subject Computer Science en_US
dc.subject Dynamic Voltage Scaling en_US
dc.subject Energy Efficient Scheduling en_US
dc.subject Integer Linear Programming en_US
dc.subject Multi-Core Processors en_US
dc.title Energy efficient voltage scheduling for multi-core processors with software controlled dynamic voltage scaling en_US
dc.type Article en_US


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