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Impact of channel tapering on threshold voltage variation in multi-layer word line 3 dimensional NAND structures

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dc.contributor.author Bhatt, Upendra Mohan
dc.date.accessioned 2025-01-20T04:33:45Z
dc.date.available 2025-01-20T04:33:45Z
dc.date.issued 2024
dc.identifier.uri https://www.taylorfrancis.com/chapters/oa-edit/10.1201/9781003559085-144/impact-channel-tapering-threshold-voltage-variation-multi-layer-word-line-3-dimensional-nand-structures-dikendra-verma-upendra-mohan-bhatt-anurag-vidyarthi
dc.identifier.uri http://dspace.bits-pilani.ac.in:8080/jspui/handle/123456789/16822
dc.description.abstract This work investigates the problems caused by the new multi-layer word line (WL) counts in 3D NAND flash memory, a technology that radically changes conventional memory designs. This study explores the effects of channel doping and taper angle on the electrical properties of vertical 3D NAND Flash memory to deliver issues related to increasing overall mold height and channel tapering. Operating Sentaurus technology computer-aided design (TCAD) tools, the investigation inspects the threshold voltage (Vth) appropriation among word lines (WLs) along the string. The goal is to assess current difficulties and propose a viable way to deal with achieving stable Vth dissemination. This includes breaking down the impacts of various shape points and channel doping levels on the electrical attributes of vertical 3D NAND flash memory. The results are expected to help improve the technology behind 3D NAND Flash memory. en_US
dc.language.iso en en_US
dc.publisher CRC Press en_US
dc.subject EEE en_US
dc.subject NAND Flash memory en_US
dc.subject Threshold voltage en_US
dc.title Impact of channel tapering on threshold voltage variation in multi-layer word line 3 dimensional NAND structures en_US
dc.type Book chapter en_US


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