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Part II: A Fully Integrated RF PA in 28-nm CMOS With Device Design for Optimized Performance and ESD Robustness

Rao, V. Ramgopal (IEEE, 2015-10)
A Fully Integrated RF PA in 28nm CMOS with Device Design for Optimized Performance and ESD Robustness

Rao, V. Ramgopal (IEEE, 2015-09)
High-Voltage MOS Device Design for Improved Static and RF Performance

Rao, V. Ramgopal (IEEE, 2015-10)
Negative differential conductivity and carrier heating in gate-all-around Si nanowire FETs and its impact on CMOS logic circuits

Rao, V. Ramgopal (IOP, 2014-02)
A novel architecture for improving slew rate in FinFET-based op-amps and OTAs

Rao, V. Ramgopal (Elsevier, 2011-05)
CMOS Logic Device and Circuit Performance of Si Gate All Around Nanowire MOSFET

Rao, V. Ramgopal (IEEE, 2014-09)
Random Dopant Fluctuation Induced Variability in Undoped Channel Si Gate all Around Nanowire n-MOSFET

Rao, V. Ramgopal (IEEE, 2015-02)
Optimization of sub 100 nm Γ-gate Si-MOSFETs for RF applications

Rao, V. Ramgopal (2005-04)
Nitrogen dilution effects on structural and electrical properties of hot-wire-deposited a-SiN:H films for deep-sub-micron CMOS technologies

Rao, V. Ramgopal (Elsevier, 2003-04)
Ultra-thin silicon nitride by hot wire chemical vapor deposition (HWCVD) for deep sub-micron CMOS technologies

Rao, V. Ramgopal (Elsevier, 2002-07)

Now showing items 1-10 of 12