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Now showing items 1-10 of 11

Toward System on Chip (SoC) Development Using FinFET Technology: Challenges, Solutions, Process Co-Development & Optimization Guidelines

Rao, V. Ramgopal (IEEE, 2011-06)
Impact of Thermal Effects on the Performance of the Power Gating Circuits Using NEMS, FinFETs, and NWFETs

Rao, V. Ramgopal (IEEE, 2021-05)
Stand-by Power Reduction Using Experimentally Demonstrated Nano-Electromechanical Switch in CMOS Technologies

Rao, V. Ramgopal (IEEE, 2021-02)
A Nano-Electro-Mechanical Switch Based Power Gating for Effective Stand-by Power Reduction in FinFET Technologies

Rao, V. Ramgopal (IEEE, 2017-05)
Considerations for Static Energy Reduction in Digital CMOS ICs Using NEMS Power Gating

Rao, V. Ramgopal (IEEE, 2017-03)
A Novel Drain-Extended FinFET Device for High-Voltage High-Speed Applications

Rao, V. Ramgopal (IEEE, 2012-10)
A Novel and Robust Approach for Common Mode Feedback Using IDDG FinFET

Rao, V. Ramgopal (IEEE, 2008-11)
On the thermal failure in nanoscale devices: Insight towards heat transport including critical BEOL and design guidelines for robust thermal management & EOS/ESD reliability

Rao, V. Ramgopal (IEEE, 2011)
A Novel Table-Based Approach for Design of FinFET Circuits

Rao, V. Ramgopal (IEEE, 2009-07)
Gate Fringe-Induced Barrier Lowering in Underlap FinFET Structures and Its Optimization

Rao, V. Ramgopal (IEEE, 2008-01)

Now showing items 1-10 of 11