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The impact of high-/spl kappa/ gate dielectrics and metal gate electrodes on sub-100 nm MOSFETs

Rao, V. Ramgopal (IEEE, 1999-07)
Gate Stack Architecture Analysis and Channel Engineering in Deep Sub-Micron MOSFETs

Rao, V. Ramgopal (IOP, 1999)
Exploration of Velocity Overshoot in a High-Performance Deep Sub-0.1- m SOI MOSFET with Asymmetric Channel Profile

Rao, V. Ramgopal (IEEE, 1999-10)
Simulation, fabrication and characterization of high performance planar-doped-barrier sub 100 nm channel MOSFETs

Rao, V. Ramgopal (IEEE, 1997-12)
Radiation Induced Interface State Generation in Nitrided and Reoxidized Nitrided Gate Oxides

Rao, V. Ramgopal (AIP, 1992-01)
The Planar-Doped-Barrier FET:MOSFET Overcomes Conventional Limitations

Rao, V. Ramgopal (IEEE, 1997-10)
Charge injection using gate-induced-drain-leakage current for characterization of plasma edge damage in CMOS devices

Rao, V. Ramgopal (IEEE, 1998-05)
Flicker Noise in GaN/Al Ga N Doped Channel Heterostructure Field Effect Transistors

Rao, V. Ramgopal (IEEE, 1998-12)
Charge trapping behaviour in deposited and grown thin metal-oxide-semiconductor gate dielectrics

Rao, V. Ramgopal (Elsevier, 1997-03)
A direct charge pumping technique for spatial profiling of hot-carrier induced interface and oxide traps in MOSFETs

Rao, V. Ramgopal (Elsevier, 1999-05)

Now showing items 1-10 of 25