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Now showing items 1-10 of 37

A CAD-compatible closed form approximation for the inversion charge areal density in double-gate MOSFETs

Rao, V. Ramgopal (Elsevier, 2009-02)
Drain Current Model Including Velocity Saturation for Symmetric Double-Gate MOSFETs

Rao, V. Ramgopal (IEEE, 2008-08)
An Improvement to the Numerical Robustness of the Surface Potential Approximation for Double-Gate MOSFETs

Rao, V. Ramgopal (IEEE, 2009-03)
1/f Noise in Drain and Gate Current of MOSFETs With High-k Gate Stacks Publisher: IEEE PDF

Rao, V. Ramgopal (IEEE, 2009-06)
Optimization of sub 100 nm Γ-gate Si-MOSFETs for RF applications

Rao, V. Ramgopal (2005-04)
Impact of lateral asymmetric channel doping on deep submicrometer mixed-signal device and circuit performance

Rao, V. Ramgopal (IEEE, 2003-12)
Modeling of parasitic capacitances in deep submicrometer conventional and high-K dielectric MOS transistors

Rao, V. Ramgopal (IEEE, 2003-04)
Reliability of ultrathin JVD silicon nitride MNSFETs under high field stressing

Rao, V. Ramgopal (IEEE, 2003-08)
Device scaling effects on hot-carrier induced interface and oxide-trapped charge distributions in MOSFETs

Rao, V. Ramgopal (IEEE, 2000-04)
The Effects of Varying Tilt Angle of Halo Implant on the Performance of Sub 100nm LAC MOSFETs

Rao, V. Ramgopal (IEEE, 2006-08)

Now showing items 1-10 of 37