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Showing 10 out of a total of 20 results for community: BITS Faculty Publications. (0.011 seconds)

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A Novel Dynamic Current Boosting Technique for Enhancement of Settling Time and Elimination of Slewing of CMOS Amplifiers

Gupta, Anu (IEEE, 2009)
Characterization of Logical Effort for Improved Delay

Gupta, Anu (Springer, 2013)
Effectiveness of body bias & hybrid logic: An energy efficient approach to design adders in sub-threshold regime

Gupta, Anu; Asati, Abhijit (Inder Science, 2016)
Selection of Optimum Device Size and Trans-Conductance Ratio for High Speed Digital CMOS Inverter Design for a Given Fanout Load

Asati, Abhijit; Shekhar, Chandra (IEEE, 2009)
TiO2−x–TiO2 Memristor Applications for Programmable Analog VLSI Circuits at 45 nm CMOS Technology Node

Vidhyadharan, Sanjay (Springer, 2020-10)
CNFET-Based Ultra-Low-Power Dual-VDD Ternary Half Adder

Vidhyadharan, Sanjay (Springer, 2021-02)
Benchmarking the Performance of Optimized TFET-Based Circuits with the Standard 45 nm CMOS Technology Using Device & Circuit Co-simulation Methodology

Vidhyadharan, Sanjay (Springer, 2019-02)
Optimization of the Tunnel FET Device Structure for Achieving Circuit Performance Better Than the Current Standard 45 nm CMOS Technology

Vidhyadharan, Sanjay (Springer, 2019-02)
A new physical insight and 3D device modeling of STI type denmos device failure under ESD conditions

Rao, V. Ramgopal (IEEE, 2009)
Silicon film thickness optimization for SOI-DTMOS from circuit performance considerations

Rao, V. Ramgopal (IEEE, 2004-06)

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