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Now showing items 21-30 of 52

Drain Bias Dependence of Gate Oxide Reliability in Conventional and Asymmetrical Channel MOSFETs in the Low Voltage Regime

Rao, V. Ramgopal (IEEE, 2000-09)
Study of Degradation in Channel Initiated Secondary Electron Injection Regime

Rao, V. Ramgopal (IEEE, 2001-09)
Simulation, fabrication and characterization of high performance planar-doped-barrier sub 100 nm channel MOSFETs

Rao, V. Ramgopal (IEEE, 1997-12)
The Planar-Doped-Barrier FET:MOSFET Overcomes Conventional Limitations

Rao, V. Ramgopal (IEEE, 1997-10)
Drain current model for nanoscale double-gate MOSFETs

Rao, V. Ramgopal (Elsevier, 2009-09)
Semiconductor Science and Technology Design of a 0.1 µm single halo (SH) thin film silicon-on-insulator (SOI) MOSFET for analogue applications

Rao, V. Ramgopal (IOP, 2005-07)
The effect of LAC doping on deep submicrometer transistor capacitances and its influence on device RF performance

Rao, V. Ramgopal (IEEE, 2004-09)
Power-area evaluation of various double-gate RF mixer topologies

Rao, V. Ramgopal (IEEE, 2005-09)
Performance and Hot-Carrier Reliability of 100 nm Channel Length Jet Vapor Deposited Si3N4 MNSFETs

Rao, V. Ramgopal (IEEE, 2001-04)
A study of hot-carrier induced interface-trap profiles in lateral asymmetric channel MOSFETs using a novel charge pumping technique

Rao, V. Ramgopal (Elsevier, 2001-10)

Now showing items 21-30 of 52