DSpace Home
→
BITS Faculty Publications
→
Department of Electrical and Electronics Engineering
→
Recent submissions

Department of Electrical and Electronics Engineering: Recent submissions

Now showing items 61-80 of 1919

Flexible Silicon: Status, Opportunities, and Challenges

Gupta, Navneet (IEEE, 2024-09)

The rise of the Internet of Everything has spurred the need for flexible and stretchable electronic devices, particularly in biomedical applications. Monocrystalline silicon, a key material in the semiconductor industry, ...
Modeling and Optimization of Graphene-PEN Based Flexible Piezoresistive Pressure Sensor (FPPS) for Enhanced Sensitivity

Gupta, Navneet (IEEE, 2024-09)

This paper presents a comprehensive study on the modelling and optimization of a graphene - polyethylene naphthalate (PEN) based flexible piezoresistive pressure sensor (FPPS). Leveraging the unique properties of graphene ...
Pre-layout estimation of performance and design of basic analog circuits in stress enabled technologies

Mishra, Neeraj (IEEE, 2015-06)

In stress enabled technologies the drive strength of multi-fingered (MF) transistors varies with the number of fingers (NF) because of Layout Dependent Effect (LDE). This is an important issue because MF transistors are ...
Design and Characterization of Bulk Driven MOS Varactor based VCO at Near Threshold Regime

Mishra, Neeraj (IEEE, 2018-10)

A wide tuning range, low VCO gain and a low PVT variations are the requirements for Ring Oscillators at near threshold voltages (NTV). Current starved ring oscillators (CSRO) have voltage headroom issues in NTV regime. A ...
MOS Varactor RO Architectures in Near Threshold Regime Using Forward Body Biasing Techniques

Mishra, Neeraj (IEEE, 2019-05)

Due to small output swings and series stack transistors, Differential Ring Oscillators (DRO) and current starved ROs are not well suited for Near Threshold Voltage (NTV) regime. MOS varactor based Single Ended Ring Oscillators ...
Variation-Aware Prediction of Circuit Performance in Near-Threshold Regime Using Supply-Independent Transition Threshold Points

Mishra, Neeraj (IEEE, 2019-11)

Due to the highly variation-prone nature of the near-threshold voltage (NTV) circuits, it is critical to have design and performance models that consider process, voltage, and temperature (PVT) variations. However, in the ...
Design and Realization of High-Speed Low-Noise Multi-Loop Skew-Based ROs Optimized for Even/Odd Multi-Phase Signals

Mishra, Neeraj (IEEE, 2019-12)

This brief presents a general approach for generating high-frequency multiphase signals (even/odd), low phase noise, low power, and reduced supply sensitivity ring oscillators (ROs). For the same, multi-loop skew based ...
An Efficient and Accurate Variation-Aware Design Methodology for Near-Threshold MOS-Varactor-Based VCO Architectures

Mishra, Neeraj (IEEE, 2020-11)

In this article, a variation-aware design methodology for high-performance MOS-varactor voltage-controlled ring oscillator (MV-VCRO) in near-threshold-voltage (NTV) regime is proposed. The MV-VCRO is suitable because it ...
Delay Modulation in Separately Driven Delay Cells Utilized for the Generation of High-Performance Multiphase Signals Using ROs

Mishra, Neeraj (IEEE, 2021-05)

This brief presents a general technique for achieving the highest possible RO oscillation frequency accompanied by lower phase noise in an enhanced circuit design utilizing novel delay cells. The circuit architecture has ...
A Variation Aware Jitter Estimation Methodology in ROs Considering Over/Undershoots in NTV Regime

Mishra, Neeraj (IEEE, 2021-08)

A time-domain jitter estimation methodology considering process-voltage-temperature (PVT) variations of the single-ended ring oscillator (SERO) at an early stage of design is presented for near-threshold voltage (NTV) ...
Phase Noise Analysis of Separately Driven Ring Oscillators

Mishra, Neeraj (IEEE, 2022-08)

In this paper, for the first time, the phase noise analysis of a Multi-loop Skew based Single Ended Oscillator (MSSROs) is derived and validated. Compared to the three stages of conventional ring oscillators (CROs), SDROs ...
Aging-Aware Timing Model of CMOS Inverter: Path Level Timing Performance and Its Impact on the Logical Effort

Mishra, Neeraj (IEEE, 2022-12)

A static timing analysis (STA) methodology based on an effective current source model (ECSM) is proposed for the first time for estimating the aging-aware path-level timing performance and its impact on the logical effort ...
Generalized Edge Propagation and Multi-Band Frequency Switching Mechanism for MSSROs

Mishra, Neeraj (IEEE, 2023-04)

In this brief, generalized Phase Sequence and multi-band Frequency Switching mechanisms in Multi-Loop Separately-Driven Skew-Based Ring Oscillators (MSSROs) are presented for the first time. Compared to inverter-based ...
Beyond SPICE Simulation: A Novel Variability-Aware STA Methodology for Digital Timing Closure

Mishra, Neeraj (IEEE, 2023-07)

This article proposes a method for performing device-level variability-aware static timing analysis (STA) on digital circuits using a tool flow methodology based on Python and Bash scripting. The method involves creating ...
Prediction of variation aware FOSC in ring oscillators (ROs) to mitigate the impact of aging on RO-PUF

Mishra, Neeraj (Elsevier, 2023-12)

We propose a methodology to predict device-level variability (including aging) impact on the oscillation frequency () of an -stage ring oscillator (RO). This task is accomplished by creating a tool in a Python environment ...
ABB Assisted Area Efficient Vernier Delay Line Time-to-Digital Converter for Low Voltage Applications

Mishra, Neeraj (IEEE, 2023-11)

We propose an Adaptive Body Biasing (ABB) assisted method for the improvement in resolution and reduction in on-chip area of time-to-digital converter (TDC). The proposed method also improves the metastability window with ...
Influences of Source/Drain Extension Region on Thermal Behavior of Stacked Nanosheet FET

Mishra, Neeraj (IEEE, 2024-01)

A well-calibrated numerical-simulation-based study reveals that an elongated extension region can be a notable approach for the self-heating mitigation of nanosheet FETs. It is observed that a longer extension length ( ...
Switching Activity Factor-Based ECSM Characterization (SAFE): A Novel Technique for Aging-Aware Static Timing Analysis

Mishra, Neeraj (IEEE, 2024-05)

We propose switching activity factor-based effective current source model (SAFE) for aging-aware static timing analysis (STA), a new technique for estimating the timing performance of digital circuits. SAFE is based on the ...
Outage Analysis of IRS-Assisted Dual-Hop Mixed RF-UWOC Network

Joshi, Sandeep; Chaubey, Vinod Kumar (IEEE, 2023-06)

In this work, we derive the outage analysis of an intelligent reflecting surface (IRS)-assisted dual-hop mixed radio frequency (RF)-underwater wireless optical communication (UWOC) network. For diverse underwater operations ...
Outage Analysis of an IRS-Assisted 5G and Beyond Wireless Communications System

Joshi, Sandeep; Chaubey, Vinod Kumar (IEEE, 2023-06)

In this work, we present an outage analysis of an intelligent reflecting surface (IRS)-assisted wireless communications system considering direct and indirect communication links between the transmitter and the receiver. ...

Now showing items 61-80 of 1919

Search DSpace

Advanced Search

Browse

All of DSpace
This Collection
- By Issue Date
- Authors
- Titles
- Subjects

Recently added

Department of Electrical and Electronics Engineering: Recent submissions

Search DSpace

Browse

All of DSpace

This Collection

My Account