dc.contributor.author | Chauhan, Ranjeet Singh | |
dc.date.accessioned | 2021-09-27T08:00:30Z | |
dc.date.available | 2021-09-27T08:00:30Z | |
dc.date.issued | 1978-11-06 | |
dc.identifier.uri | http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/2230 | |
dc.description | Supervisor: Dr. H.C. Misra | en_US |
dc.language.iso | en | en_US |
dc.publisher | BITS Pilani | en_US |
dc.subject | Computer Science | en_US |
dc.subject | Algorithm | en_US |
dc.title | A Computer architecture based on maximum bit utilization | en_US |
dc.type | Thesis | en_US |