High Performance VLSI Architecture for Digital FIR Filter Design

dc.contributor.author	Reddy, Srinivasa K.
dc.date.accessioned	2022-04-29T10:17:53Z
dc.date.available	2022-04-29T10:17:53Z
dc.date.issued	2015
dc.identifier.uri	http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/4509
dc.description	Supervisor: Subhendu Kumar Sahoo	en_US
dc.language.iso	en	en_US
dc.publisher	BITS, Pilani	en_US
dc.subject	Electronics Engineering	en_US
dc.subject	Digital FIR Filter Design	en_US
dc.title	High Performance VLSI Architecture for Digital FIR Filter Design	en_US
dc.type	Thesis	en_US