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Methodologies for Area Speed and Power Optimization in High Level Synthesis for Diverse Applications

Methodologies for Area Speed and Power Optimization in High Level Synthesis for Diverse Applications

Sikka, Prateek
URI: http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/4559
Date: 2021

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Supervisor(s): Asati, Abhijit and Shekhar, Chandra

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