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Methodologies for Area Speed and Power Optimization in High Level Synthesis for Diverse Applications
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| dc.contributor.author | Sikka, Prateek | |
| dc.date.accessioned | 2022-05-01T11:07:00Z | |
| dc.date.available | 2022-05-01T11:07:00Z | |
| dc.date.issued | 2021 | |
| dc.identifier.uri | http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/4559 | |
| dc.description | Supervisor(s): Asati, Abhijit and Shekhar, Chandra | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | BITS Pilani | en_US |
| dc.subject | Pharmacy | en_US |
| dc.subject | Power Optimization | en_US |
| dc.subject | High Level Synthesis | en_US |
| dc.subject | Diverse Applications | en_US |
| dc.title | Methodologies for Area Speed and Power Optimization in High Level Synthesis for Diverse Applications | en_US |
| dc.type | Thesis | en_US |
