| dc.description.abstract |
Rapid increases in chip complexity, increasingly faster clocks
and proliferation of portable devices have combined to make
power dissipation an important design parameter. The power
consumption of a system determines its heat dissipation as well
as battery life. For some digital systems, power consumption has
become the most critical design constraint. To satisfy the low
power requirement one of the best technique sub-threshold logic is
being introduced. This paper presents a complete review of recent
research and explores all aspects/ constraints of subthreshold logic
design technique. The paper explores basics of subthreshold,
sources of power dissipation, challenges in subthreshold design,
optimization methodology and various types of techniques which
are currently used to implement ultra low power based circuits
using subthreshold logic |
en_US |