| dc.contributor.author |
Gupta, Anu |
|
| dc.date.accessioned |
2023-02-10T08:49:49Z |
|
| dc.date.available |
2023-02-10T08:49:49Z |
|
| dc.date.issued |
2009 |
|
| dc.identifier.uri |
https://ieeexplore.ieee.org/document/5328055 |
|
| dc.identifier.uri |
http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9142 |
|
| dc.description.abstract |
A very simple technique to achieve low settling time is presented. It is based on the combination of class AB differential input stages, local common-mode feedback (LCMFB), and clamping circuit which provides additional current boosting, keeping the gain-bandwidth product (GBW) nearly constant. The slew enhancement is provided by an auxiliary circuit which is activated only during transients. The design is based on the ldquoTSMC 180 nm CMOS technologyrdquo |
en_US |
| dc.language.iso |
en |
en_US |
| dc.publisher |
IEEE |
en_US |
| dc.subject |
EEE |
en_US |
| dc.subject |
Boosting |
en_US |
| dc.subject |
CMOS technology |
en_US |
| dc.subject |
Operational amplifiers |
en_US |
| dc.subject |
CMOS Devices |
en_US |
| dc.subject |
Pulse amplifiers |
en_US |
| dc.subject |
Capacitors |
en_US |
| dc.title |
A Novel Dynamic Current Boosting Technique for Enhancement of Settling Time and Elimination of Slewing of CMOS Amplifiers |
en_US |
| dc.type |
Article |
en_US |