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A simple approach to improvement in performance of UPQCin presence of unbalanced load

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dc.contributor.author Mathur, Hitesh Dutt
dc.contributor.author Bhanot, Surekha
dc.contributor.author Patel, Ashish
dc.date.accessioned 2023-02-17T04:06:45Z
dc.date.available 2023-02-17T04:06:45Z
dc.date.issued 2017
dc.identifier.uri https://ieeexplore.ieee.org/abstract/document/8308971
dc.identifier.uri http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9290
dc.description.abstract This paper proposes a simple control technique for Distributed Generation fed Unified Power Quality Conditioner (UPQCdg) in presence of unbalanced load. Compensation of unbalanced load causes second order ripples in DC link voltage of UPQCdg, which leads to ripples in reference current estimated by PI controller, and eventually unbalance & harmonics in source currents. This paper proposes use of a mean block at output of PI controller to prevent ripples passing onto reference current. Selection criterion of proposed mean block is discussed. Also, a `percentage unbalance' parameter is proposed for computing unbalance in three phase quantities and comparing among different cases. Performance of proposed technique is validated using Real Time Digital Simulation (RTDS) in Opal-RT. Steady state performance of proposed technique is verified in presence of non-linear and unbalanced loads, and dynamic performance is tested during voltage sag, swell, change in load and variation in solar irradiation. RTDS results express superiority of proposed method over conventional one. en_US
dc.language.iso en en_US
dc.publisher IEEE en_US
dc.subject EEE en_US
dc.subject Voltage control en_US
dc.subject Power quality en_US
dc.subject Active filters en_US
dc.subject Oscillators en_US
dc.subject Field programmable gate arrays en_US
dc.subject Steady-state en_US
dc.subject Shunts (electrical) en_US
dc.title A simple approach to improvement in performance of UPQCin presence of unbalanced load en_US
dc.type Article en_US


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