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A Dual-Mode In-Memory Computing Unit Using Spin Hall-Assisted MRAM for Data-Intensive Applications

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dc.contributor.author Chaturvedi, Nitin
dc.date.accessioned 2023-03-14T10:10:09Z
dc.date.available 2023-03-14T10:10:09Z
dc.date.issued 2021-04
dc.identifier.uri https://ieeexplore.ieee.org/document/9354191
dc.identifier.uri http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9714
dc.description.abstract The emerging big data application poses many non-traditional challenges to a conventional computing system. The processing of a large amount of data in a conventional computing system involves frequent data movement between the processor and the memory. As a result, power consumption and latency of the system increases, most commonly known as the von Neumann bottleneck. To address this von Neumann bottleneck, processing in memory is considered one of the most promising solutions for energy-efficient computing in data-intensive applications. Therefore, in this work, we propose an in-memory computing unit based on emerging non-volatile magnetic random access memory (MRAM), which can perform computations directly within the memory. We call the proposed memory unit computational MRAM (C-MRAM). The proposed array works in two modes: 1) memory mode, where it acts as standard memory with the additional advantage of non-volatility, and 2) logic mode, where it performs the computation inside the memory array. To demonstrate the benefits of the proposed C-MRAM array, we realize an approximate adder (Ax-ADD) for energy-constraint applications in which further power saving is achieved by relaxing the demand for computational accuracy. Furthermore, we propose to use the C-MRAM array in hybrid multi-bank architecture, which offers the flexibility of reconfiguring the proposed C-MRAM as a memory array or logic array to meet the requirement of a wide range of applications. The simulation result shows that the proposed array can efficiently perform memory, logic, and arithmetic operation in 2, 4, and 6 ns while consuming 0.2, 0.47, and 0.7 pJ of energy. en_US
dc.language.iso en en_US
dc.publisher IEEE en_US
dc.subject EEE en_US
dc.subject Approximate adder (Ax-ADD) en_US
dc.subject In-Memory Computing (IMC) en_US
dc.subject Magnetic Random-Access Memory (MRAM) en_US
dc.subject Spin Hall effect (SHE) en_US
dc.subject Spin-transfer torque (STT) en_US
dc.title A Dual-Mode In-Memory Computing Unit Using Spin Hall-Assisted MRAM for Data-Intensive Applications en_US
dc.type Article en_US


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