| dc.contributor.author |
Chaturvedi, Nitin |
|
| dc.date.accessioned |
2023-03-15T06:51:22Z |
|
| dc.date.available |
2023-03-15T06:51:22Z |
|
| dc.date.issued |
2019 |
|
| dc.identifier.uri |
https://ieeexplore.ieee.org/document/8944846 |
|
| dc.identifier.uri |
http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9734 |
|
| dc.description.abstract |
A non-volatile SRAM cell is proposed for low power applications using Spin Transfer Torque-Magnetic Tunnel Junction (STT-MTJ) devices. This novel cell offers non-volatile storage, thus allowing selected blocks of SRAM to be switched off during standby operation. To further increase the power savings, a write termination circuit is designed which detects completion of MTJ write and closes the bidirectional current path for the MTJ. A reduction of 25.81% in the number of transistors and reduction of 2.95% in the power consumption is achieved in comparison to prior work on write termination circuits. |
en_US |
| dc.language.iso |
en |
en_US |
| dc.publisher |
IEEE |
en_US |
| dc.subject |
EEE |
en_US |
| dc.subject |
SRAM |
en_US |
| dc.subject |
Non-Volatile Memory (NVM) |
en_US |
| dc.subject |
Write termination |
en_US |
| dc.subject |
Magnetic Tunnel Junction (MTJ) |
en_US |
| dc.subject |
Low power |
en_US |
| dc.title |
A Novel Low Power Non-Volatile SRAM Cell with Self Write Termination |
en_US |
| dc.type |
Article |
en_US |