| dc.description.abstract |
With the advent of technology, a change from feature size to nanometer regime resulted in the scaling of operating voltages and dimensions. Reducing them can greatly boost the energy efficiency but it also leads to increased design challenges. To deal with the activity limitations imposed by the low overdrive voltage and the intrinsic read stability/write margin trade off, large scale SRAM arrays largely rely on assist techniques. These techniques address the problem of preserving the functionality of the 6T SRAM cell by improving the read and write margins of the cell. In this paper, we show a comprehensive analysis of the effectiveness of some assist methods. This paper presents the margin sensitivity analysis of assist techniques to assess the productiveness of assist methods and to investigate their direct impact on the voltage sensitive yield. In addition, the effect of temperature variation and process variation have also been analyzed |
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