dc.contributor.author |
Chaturvedi, Nitin |
|
dc.date.accessioned |
2023-03-15T07:16:23Z |
|
dc.date.available |
2023-03-15T07:16:23Z |
|
dc.date.issued |
2016 |
|
dc.identifier.uri |
https://ieeexplore.ieee.org/document/7915013 |
|
dc.identifier.uri |
http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9739 |
|
dc.description.abstract |
This paper investigates the application of Spin-Transfer Torque Magnetic Tunnel Junctions (STT-MTJ) in nonvolatile memory design. MTJs are favored in NVM design as they can provide indefinite data retention and very high read/write speeds. In this work, we have presented the design and analysis of a non-volatile, low power Muller C-element with almost-zero leakage current and instantaneous back-up and wake-up times. The simulations results of the C-element based on technology incorporating CMOS FD-SOI and Spin Transfer Torque MTJs are compared with those of a design in which FinFETs are utilized instead of the FDSOI transistors. The two implementations are compared on the basis of idle power consumption, energy required for read and write functionality as well as output delay in addition to the scalability analysis of both the technologies. |
en_US |
dc.language.iso |
en |
en_US |
dc.publisher |
IEEE |
en_US |
dc.subject |
EEE |
en_US |
dc.subject |
Spin Transfer Torque-Magnetic Tunnel Junction (STT-MTJ) |
en_US |
dc.subject |
Non-volatile C-element |
en_US |
dc.subject |
Almost-zero leakage |
en_US |
dc.subject |
CMOS-FDSOI |
en_US |
dc.subject |
Nanoscale Parabolic FinFET |
en_US |
dc.title |
Design of non-volatile asynchronous circuit using CMOS-FDSOI/FinFET technologies |
en_US |
dc.type |
Article |
en_US |