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Design and simulation of piezoelectric MEMS logic gates

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dc.contributor.author Yenuganti, Sujan
dc.date.accessioned 2023-03-22T08:58:27Z
dc.date.available 2023-03-22T08:58:27Z
dc.date.issued 2023-01
dc.identifier.uri https://www.tandfonline.com/doi/full/10.1080/00150193.2022.2149306
dc.identifier.uri http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9905
dc.description.abstract In this article, MEMS-based logic gates such as OR, AND, NOT, NOR, and NAND gates with functionalities similar to the electronic digital devices are designed and simulated. The key feature of these logic devices is that the mechanical cantilever structure of the basic piezo-actuator is adapted to operate like a particular digital logic gate based on the digital inputs. Complete analytical modelling for a single piezo-actuator with a correlation between its out-of-plane tip deflection with applied voltage is obtained. The proposed digital logic devices are further validated through simulation using the MEMS CAD tool CoventorWare. en_US
dc.language.iso en en_US
dc.publisher Taylor & Francis en_US
dc.subject EEE en_US
dc.subject Actuator en_US
dc.subject Cantilever Switch en_US
dc.subject Logic gates en_US
dc.subject MEMS en_US
dc.subject Spiezoelectric actuation en_US
dc.title Design and simulation of piezoelectric MEMS logic gates en_US
dc.type Article en_US


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